Use 4 D-bascules connected in serial, all synchronized with
the same CLK. Then connect all 4 outputs, & 2nd output must
reverse, of the D-bascule to an AND logic. The output of
the AND logic sould have '1' when it detectes "1101". This
technic oftenly use for glitch detection in the signal.
What type of registers contains an (INTEL) CPU?
IS 8085 an embedded system?
What is an anti aliasing filter? Why is it required?
Suppose i am using I2C communication, in that first i am sending address of thesalve and then data then after i want to read the data which i was sent recently, in that case before i am reading is there any need to send a stop bit before read?
Explain what is plc system?
How to implement a fourth order Butterworth LP filter at 1kHz if sampling frequency is 8 kHz?
What is difference between micro processor & micro controller?
What is Page Fault or Page thrashing?
Can we use semaphore or mutex or spin lock in interrupt context in linux kernel?
DMA deals with which address (physical/virtual addresses)?
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