21⟩ How do we handle precise exceptions or interrupts?
Like java have a feature for handling exception handling "prime catch".the exception like divide by zero,out of bound.
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Like java have a feature for handling exception handling "prime catch".the exception like divide by zero,out of bound.
Subroutine are the part of executing processes(like any process can call a subroutine for achieve task),while the interrupt subroutine never be the part.interrupt subroutine are subroutine that are external to a process.
This form of mapping is a modified form of the direct mapping where the disadvantage of direct mapping is removed. Set-associative mapping allows that each word that is present in the cache can have two or more words in the main memory for the same index address.
65 to decimal
65/16=4
remainder=1
==41 decimal
decimal to binary
101001
In this type of mapping the associative memory is used to store content and addresses both of the memory word. This enables the placement of the any word at any place in the cache memory. It is considered to be the fastest and the most flexible mapping form.
In direct mapping the RAM is made use of to store data and some is stored in the cache. An address space is split into two parts index field and tag field. The cache is used to store the tag field whereas the rest is stored in the main memory. Direct mapping`s performance is directly proportional to the Hit ratio.
★ In case of vertical micro code every action is encoded in density.
★ Vertical micro code are slower but they take less space and their actions at execution time need to be decoded to a signal.
★ In this types of code the micro code contains the control signal without any intermediary.
★ Horizontal micro code instruction contain a lot of signals and hence due to that the number of bits also increase.
★ High level languages are easily understandable.
★ The programs that are developed in high level language are portable.
★ In case of high level languages debugging of the code is easy and the program written is not machine dependent.
★ Although Assembly level languages are not easy to understand they are relatively easier as compared to machine level languages.
★ The programs written in this language are not portable and the debugging process is also not very easy.
★ The programs developed in assembly language are thoroughly machine dependent.
Partitioning involves the user to partition their hard drives and then they can implement / install multiple operating systems on them. The user requires a boot manager to switch between different operating systems.
★ Partitioning allows each operating system to work optimally.
★ Each os has the complete access to the hardware of the system on which it is being executed.
★ Also depending on the file system used the user is free to resize his partition according to his needs.
★ But manual partition is not a simple task and requires patience.
★ The system needs to be restarted in case the user wants to switch operating systems.
★ Flip flops are also known as bi-stable multi-vibrators. They are able to store one bit of data.
★ Flip flops are able to be in two stable states namely one and zero. They can be in either states and in order to change their states they have to be driven by a trigger.
★ Certain flip flops are edge triggered meaning they only respond to voltage changes from one level to another. They can be either positive edged triggering or negative edged triggering.
★ Flip flops turn on in a random manner that is they can be in either of the states when they are turned on. In order to have a uniform state when they are powered on a CLEAR signal has to be sent to the flip flops. They can also be made to turn on in a particular state by applying PRESET.
★ On the basis of the demands of the CPU data is transferred between the two memories.
★ Due to this a mapping technique is required which can be implemented using page-table.
★ The page table can be organized in two ways namely in the R/W memory and by using associative logic.
★ In case of R/W memory the speed of execution of programs is slow as it requires two main memory references to read data. It is also known as memory page table.
★ In case of associative logic it is considered to be more effective because it can be built with simply keeping mind to have equal no. of blocks in the memory as many as there are words.
In a way virtualization appears similar to emulation but actually it shares hardware resources from the host OS.
★ This method is slower as compared to partition method but is faster than emulation.
★ Virtualization had also vast support considering it can also provide with 3d support.
★ With the help of virtualization it enable users to create virtual clusters.
★ But virtualization systems require a lot of memory in form of ram.
★ For virtualization it is mandatory that the virtualized platform has the same architecture as the host pc otherwise due to incompatibilities it is not possible.
Two different ways of establishing hardware priority are Daisy Chaining and parallel priority.
★ Daisy chaining is a form of a hardware implementation of the polling procedure.
★ Parallel priority is quicker of the two and uses a priority encoder to establish priorities.
★ In parallel priority interrupt a register is used for which the bits are separated by the interrupt signals from every device.
★ The parallel priority interrupt may also contain a mask register which is primarily used to control the status of every request regarding interrupts.
For any computer generally the memory space is lesser as compared to the address space this implies that the main memory is lesser as compared to the secondary memory.
The following are the main reasons for pipe line conflicts in the processor:
★ When the same resource is accessed at the same time by two different segments it results in resource conflicts. The only way to resolve this problem is to use separate data memories.
★ In case an instruction's execution depends on the result of a previous instruction and that result is unavailable it leads to data dependency conflicts.
★ Instructions that change the count of the PC can cause a lot of problems. This is prevalent particularly in the case of Branch instructions. A method to resolve this issue is known as delayed load where certain instruction are made to execute in a delayed manner to avoid conflicts.
RISC meaning reduced instruction set as the acronym say aims to reduce the execution times of instructions by simplifying the instructions. The major characteristics of RISC are as follows:
★ Compared to normal instructions they have a lower number of instructions.
★ The addressing modes in case of RISC is also lower.
★ All the operations that are required to be performed take place within the CPU.
★ All instruction are executed in a single cycle hence have a faster execution time.
★ in this architecture the processors have a large number of registers and a much more efficient instruction pipeline.
★ Also the instruction formats are of fixed length and can be easily decoded.
The main components of the Ven Nuemann architecture were as follows:
★ It consisted of a main memory which would be used to store all the data and instructions.
★ It would consist of an arithmetic logical unit also known as the ALU. This part was to be able to work with binary data.
★ It also comprised of a control unit which would be responsible for the interpretation of instructions and their execution.
★ The control unit would also be controlled by the control unit itself.